Product Summary

The EM6A9320BIA-5H is a high-speed CMOS double data rate synchronous DRAM containing 128 Mbits. The EM6A9320BIA-5H is internally configured as a quad 1M 32 DRAM with a synchronous interface (all signals are registered on the positive edge of the clock signal, CK). Data outputs occur at both rising edges of CK andCK . Read and write accesses to the SDRAM are burst oriented; accesses start at a selected location and continue for a programmed number of locations in a programmed sequence.

Parametrics

EM6A9320BIA-5H absolute maximum ratings: (1)VIN, VOUT Input, Output Voltage: - 0.3 ~ VDDQ+0.3 V; (2)VDD, VDDQ Power Supply Voltage: -0.3 ~ 3.6 V; (3)TA Ambient Temperature: 0~70℃; (4)TSTG Storage Temperature: - 55~150℃; (5)TSOLDER Soldering Temperature (10s): 260℃; (6)PD Power Dissipation: 2.0 W; (7)IOUT Short Circuit Output Current: 50 mA.

Features

EM6A9320BIA-5H features: (1)Fast clock rate: 200/250 MHz; (2)Differential Clock CK & CK input; (3)4 Bi-directional DQS. Data transactions on both edges of DQS (1DQS / Byte); (4)DLL aligns DQ and DQS transitions; (5)Edge aligned data & DQS output; (6)Center aligned data & DQS input; (7)4 internal banks, 1M x 32-bit for each bank; (8)Programmable mode and extended mode registers; (9)All inputs except DQ’s & DM are at the positive edge of the system clock; (10)4 individual DM control for write masking only; (11)Auto Refresh and Self Refresh; (12)4096 refresh cycles / 32ms; (13)Power supplies: VDD & VDDQ = 2.5V ± 5%; (14)Pb Free and Halogen Free.

Diagrams

EM6A9320BIA-5H block diagram

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