HD6417750SF167

32-bit RISC microprocessor, 256BGA, Superscalar architecture, 64-entry, –0.3 to 4.2 V, HD6417750SF167

Rated 5 Rating 5 | reviews | Write a review

Price:: US $12.47~4,042.00 / piece [Get Latest Price]

Reference price:

Qty (lots)	Price/lot
	US $12.47~4,042.00

PartNumber:: HD6417750SF167

Brand:: Hitachi Ltd - Hitachi | Pack: QFP | D/C: 03+

Availability:: Supply Ability: 10000/Week Can Ship Immediately
Delivery: 10-15 Business Days (ships out within 3 Business days)

Quantity:: piece

Total Price:: US $0

Place Order via Escrow Service

Sold By

Ms. hellen's store

(Hong Kong)

add to my favourite

100% Positive feedback

Detailed seller ratings

Visit Store

Contact Now

Esrcow Service

Place orders confidently and securely via it

Safe payments
Quick and easy transactions
Free service charges

Learn More >>

Previous Next

Products Upload time: 2012-11-16

From Other Seller

Part Number:HD6417750SF167
US $12.47 - 4,042.00
iphone5 data cable

US $4.00 - 5.00 / Piece
(0) Remove
HEF4093BT

US $0.15 - 1.20 / Piece
(0) Remove
Quantity:

piece

Product Summary

The HD6417750SF167 is a 32-bit RISC (reduced instruction set computer) microprocessor, featuring object code upward-compatibility with SH-1, SH-2, and SH-3 microcomputers. The HD6417750SF167 includes an instruction cache, an operand cache with a choice of copy-back or write-through mode, and an MMU (memory management unit) with a 64-entry fully-associative unified TLB (translation lookaside buffer). The HD6417750SF167 has a 16-kbyte instruction cache and a 32-kbyte data cache.

Parametrics

HD6417750SF167 absolute maximum ratings: (1)I/O, PLL, RTC, CPG power supply voltage, VDDQ: –0.3 to 4.2, –0.3 to 4.2 V; (2)Internal power supply voltage, VDD: –0.3 to 2.5, –0.3 to 2.1 V; (3)Input voltage, Vin: –0.3 to VDDQ + 0.3 V; (4)Operating temperature, Topr: –20 to 75, –40 to 85 ℃; (5)Storage temperature, Tstg: –55 to 125 ℃.

Features

HD6417750SF167 features: (1)General register file: Sixteen 32-bit general registers (and eight 32-bit shadow registers); Seven 32-bit control registers; Four 32-bit system registers; (2)RISC-type instruction set (upward-compatible with SH Series): Fixed 16-bit instruction length for improved code efficiency; Load-store architecture; Delayed branch instructions; Conditional execution; C-based instruction set; (3)Superscalar architecture (providing simultaneous execution of two instructions) including FPU; (4)Instruction execution time: Maximum 2 instructions/cycle; (5)Virtual address space: 4 Gbytes (448-Mbyte external memory space); (6)Space identifier ASIDs: 8 bits, 256 virtual address spaces; (7)On-chip multiplier; (8)Five-stage pipeline.